Tubii_Tk2/worklib/tubii_spkr/entity/vhdl.vhd
2015-03-01 03:06:44 -05:00

10 lines
201 B
VHDL

-- generated by newgenasym Sun Mar 01 03:06:01 2015
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity tubii_spkr is
port (
SPKR_SIG: IN STD_LOGIC);
end tubii_spkr;