mirror of
https://github.com/parallella/parallella-hw.git
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113 lines
3.9 KiB
Plaintext
113 lines
3.9 KiB
Plaintext
--------------------------------------------------------------------------
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This file describes how to reprogram the content of the 128Mb
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QSPI boot flash on the Parallella board.
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To update the image on a board that has previously been programmed,
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power-on the board with no SD card inserted and start with step 9. In
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this case no Xilinx USB cable or Xilinx tools are required, only
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a serial connection and terminal program.
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-------------------------------------------------------------------------
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Directory Content:
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parallella.[7010|7020].flash.bin (bootable flash image)
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parallella.bit.bin (FPGA bitstream loaded by U-Boot from SD card)
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fsbl.elf (First Stage Boot Loader)
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uboot.elf (U-Boot executable)
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stub.tcl (tcl script for putting the CPU in debug mode)
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ps7_init.tcl (FSBL settings as tcl script for JTAG operation)
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The u-boot.elf is compiled from the parallella-uboot repository using the arm
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gcc compiler.
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The fsbl.elf is generated from the Xilinx tool chain
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The parallella fpga bit files are generated by the Xilinx tool chain.
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--------------------------------------------------------------------------
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Pre-requisites:
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-Xilinx Platform USB Cable II
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-Serial port console cable
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-Xilinx tools installed
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--------------------------------------------------------------------------
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1. Make sure you have xilinx tools installed and you have the
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correct path set. For example:
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my-machine:~> source /opt/Xilinx/14.7/ISE_DS/settings64.csh
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2. Copy over a raw FPGA bitstream file from the fpga project directory.
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For example: "parallella-hw/fpga/projects/parallella_7020_headless"
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3. Run the Xilinx bootgen utility to create the binary file for the flash,
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An bootgen ".bif" configuration file example is given below.
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the_ROM_image:
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{
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[bootloader]/path/to/fsbl.elf
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/path/to/your/fpga-bitstream.bin
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/path/to/u-boot.elf
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}
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my-machine:~>bootgen -image /path/to/image.bif -o i parallella.XXXX.flash.bin
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(where "XXXX" is either 7010 or 7020 to match the Zynq chip on the board)
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4. Connect a console cable to the three pin serial port header and a computer.
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running a console application such as putty or tera term.
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5. Connect the Xilinx Platform USB II cable to the JTAG PEC_POWER pins. (Note
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that you will need a PEC_POWER breakout board for this). Connect the
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JTAG cable to the Linux based computer running the Xilinx software. There
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may be a driver conflict between the Xilinx cable and the serial cable so
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the safe bet is to connect the cables in step 2 and 3 to separate computers.
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6. Power on the board
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7. Start the JTAG debugger on machine connected to JTAG cable:
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my-machine:~>xmd
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8. Enter the following command sequence in XMD to run the u-boot application
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through the JTAG loader:
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XMD% connect arm hw
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XMD% source ./ps7_init.tcl
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XMD% ps7_init
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XMD% init_user
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XMD% source ./stub.tcl
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XMD% target 64
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XMD% dow u-boot.elf
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XMD% con
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9. Insert an SD card with the file called "parallella.XXXX.flash.bin" on boot
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partition, where "XXXX" is either 7010 or 7020 to match the Zynq chip on
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the board.
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10. In the serial port console program enter the following sequence:
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(Note: Takes several minutes, be patient)
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mmcinfo
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fatload mmc 0 0x4000000 parallella.XXXX.flash.bin
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sf probe 0 0 0
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sf erase 0 0x1000000
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sf write 0x4000000 0 0x$filesize
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11. Set the ethernet address and SKU. The first 6 characters of the MAC address
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contain the Adapteva assigned range of MAC-IDs. The last 6 characters should
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match the serial number ("SN") on the board sticker. The AdaptevaSKU should
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match the SKU on the sticker including the "SKU" at the start.
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zynq-uboot> set ethaddr 04 4F 8B 00 00 00 (for example)
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zynq-uboot> set AdaptevaSKU SKUA101040 (for example)
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zynq-uboot> saveenv
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12. Power down board
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13. At this point the board is ready for general use.
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