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18 lines
1.2 KiB
Plaintext
18 lines
1.2 KiB
Plaintext
##### REFERENCE CLOCK #####
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#GIGABIT TRANSCEIVER (SFP)
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NET "SMA_MGT_REFCLK_P" LOC = J8; # KC705 J16 SMA_MGT_REFCLK_P Use MGT_REF_CLK via IBUFDS_GTE2
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NET "SMA_MGT_REFCLK_N" LOC = J7; # KC705 J15 SMA_MGT_REFCLK_N
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#NET "SMA_MGT_REFCLK_P" LOC = AD12; # Use On Board SYSCLK (200 MHz) via IBUFGDS
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#NET "SMA_MGT_REFCLK_N" LOC = AD11;
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NET "SMA_MGT_REFCLK_P" TNM_NET = SMA_MGT_REFCLK_P;
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TIMESPEC TS_SMA_MGT_REFCLK_P = PERIOD "SMA_MGT_REFCLK_P" 100 ns HIGH 50%;
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NET "SMA_MGT_REFCLK_N" TNM_NET = SMA_MGT_REFCLK_N;
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TIMESPEC TS_SMA_MGT_REFCLK_N = PERIOD "SMA_MGT_REFCLK_N" 100 ns HIGH 50%;
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NET "PPS_P" LOC = H21 | IOSTANDARD=LVDS_25; # FMC J22 pin G36 = Soft-PLL "OUT0_P" |
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NET "PPS_N" LOC = H22 | IOSTANDARD=LVDS_25; # FMC J22 pin G37 = Soft-PLL "OUT0_N" |-> Lemo J5
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NET "REFCLK_P" LOC = E19 | IOSTANDARD=LVDS_25; # FMC J22 pin G21 = Soft-PLL "OUT1_P" |
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NET "REFCLK_N" LOC = D19 | IOSTANDARD=LVDS_25; # FMC J22 pin G22 = Soft-PLL "OUT1_N" |-> Lemo J6
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NET "OE0_N" LOC = D22 | IOSTANDARD=LVCMOS25; # FMC J22 pin H34 = Soft-PLL "OE0_N" (Enables the output drivers for PPS and RefClk Lemo's on the SoftPLL board)
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