Fix schematic and PCB errors #1

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5 4 3 2 1 5 4 3 2 1 A B C D A B C D Title Size Ref Rev Date: Sheet of www.raspberrypi.org © Raspberry Pi Drawn By James Adams 2020 RPI-PICO 1 <Page Modify Date> 1 A3 3 Raspberry Pi Pico SW1 TP-1221U-K9K5325 U2 RT6150B-33GQW VOUT LX2 GND LX1 VIN EN PS VINA GND FB GND_PAD C18 2u2 X5R M1005 20% 6.3V R5 200K M1005 63mW 1% C17 15p C0G M0603 5% 25V TP1 R2 100K M1005 63mW 1% R10 5K6 M1005 63mW 1% L1 2u2 C4 100n X5R M0603 10% 6.3V TP6 C7 100n X5R M0603 10% 6.3V C12 2u2 X5R M1005 20% 6.3V R14 1K M1005 63mW 1% C1 47u X5R M2012 20% 6.3V J2 CON_PICO_3W 1 2 TP5 U1 RP2040 IOVDD GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 IOVDD GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 TESTEN XIN XOUT IOVDD DVDD SWCLK SWDIO RUN GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 IOVDD GPIO22 GPIO23 GPIO24 GPIO25 GPIO26_ADC0 GPIO27_ADC1 GPIO28_ADC2 GPIO29_ADC3 IOVDD ADC_AVDD VREG_VIN VREG_VOUT USB_DM USB_DP USB_VDD IOVDD DVDD QSPI_SD3 QSPI_SCLK QSPI_SD0 QSPI_SD2 QSPI_SD1 QSPI_SS GND R3 470R M1005 63mW 1% R11 1K M1005 63mW 1% D2 Green C8 100n X5R M0603 10% 6.3V R4 tolerance NO-FIT M1005 power Q1 DMG1012T C14 2u2 X5R M1005 20% 6.3V C20 47u X5R M2012 20% 6.3V R15 tolerance NO-FIT M1005 power R8 100K M1005 63mW 1% C2 47u X5R M2012 20% 6.3V TP4 C11 100n X5R M0603 10% 6.3V C19 47u X5R M2012 20% 6.3V D1 MBR120VLSFT1G C5 100n X5R M0603 10% 6.3V X1 12MHz 2 1 4 3 R12 27R M0603 50mW 1% J0 CON_PICO_40W C16 15p C0G M0603 5% 25V C10 100n X5R M0603 10% 6.3V TP3 C13 2u2 X5R M1005 20% 6.3V C15 100n X5R M0603 10% 6.3V U3 W25Q16JVUXIQ C\S\ 1 DO_IO1 2 W\P\_IO2 3 GND 4 DI_IO0 5 CLK 6 H\O\L\D\_IO3 7 VCC 8 PAD C3 1n X7R M0603 10% 25V J1 690-005-298-486 1 2 3 4 5 6 7 8 9 R7 200R M1608 100mW 1% R13 27R M0603 50mW 1% C9 100n X5R M0603 10% 6.3V R6 100K M1005 63mW 1% R9 1R M1005 63mW 1% R1 10K M1005 63mW 1% TP2 C6 100n X5R M0603 10% 6.3V VBUS VSYS 3V3 1V1 3V3 3V3 3V3 1V1 3V3 1V1 3V3 VBUS VSYS VSYS 3V3 3V3 3V3 3V3 3V3 USB_DM USB_DP GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26_ADC0 GPIO27_ADC1 GPIO28_ADC2 GPIO29_ADC3 USB_DMX USB_DPX QSPI_SD3 QSPI_SCLK QSPI_SD0 QSPI_SD2 QSPI_SD1 QSPI_SS XIN XOUT QSPI_SS QSPI_SCLK QSPI_SD0 QSPI_SD1 QSPI_SD2 QSPI_SD3 GPIO14 GPIO15 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO25 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO22 ADC_AVDD GPIO15 RUN SWCLK SWDIO ADC_VREF SWCLK SWDIO 3V3_EN GPIO29_ADC3 USB_DP USB_DM ADC_VREF GPIO28_ADC2 GPIO27_ADC1 GPIO26_ADC0 RUN 3V3_EN GPIO24 XIN XOUT XR GPIO23 ADC current = ~150uA For best performance use external 3.0V shunt ref (e.g. LM4040) For lower offset (at expense of noise) connect VREF to 3V3 with lower resistance ADC GPIO pins have diode to VDDIO (other GPIO do not) FET stops leakage through ADC3 pin diode into 3V3 net when 3V3 supply is off (VSYS present but 3V3_EN low) DEBUG AGND BOOTSEL Disable Flash boot (forces USB boot) LED PS=0: PFM mode (default, best efficiency) PS=1: PWM mode (improved ripple but much worse efficiency at light loads) D1 D2 D3 J3 CON_PICO_3W 1 2 R16 0 Ohm M1005 63mW 1% USB_DP USB_DM QSPI_SD3 QSPI_SD2 SWCLK SWDIO DEBUG 2 D1 D2 D3 SW1 TP-1221U-K9K5325 R10 5K6 M1005 63mW 1% TP6 TP5 R3 470R M1005 63mW 1% R11 1K M1005 63mW 1% D2 Green R4 tolerance NO-FIT M1005 power C20 47u X5R M2012 20% 6.3V C19 47u X5R M2012 20% 6.3V D1 MBR120VLSFT1G R12 27R M0603 50mW 1% R7 200R M1608 100mW 1% R13 27R M0603 50mW 1% R1 10K M1005 63mW 1% 3V3 USB_DM USB_DP QSPI_SD2 QSPI_SD3 GPIO25 GPIO21 GPIO20 GPIO19 GPIO18 GPIO17 GPIO16 GPIO22 BOOTSEL Disable Flash boot (forces USB boot) LED
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Review

Adjusted based on RPI design

!thumbnail[](RPI-PICO-R3-PUBLIC.DSN){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" doc-id="67612bb56aa7d3a48b11" diff-visibility="full" variant="default" view-coords="47.3,28.2,55.1,43.5" aspect-ratio="1.405" } Adjusted based on RPI design
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Review

Added LED connected to GPIO25

!thumbnail[](RPI-PICO-R3-PUBLIC.DSN){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" doc-id="67612bb56aa7d3a48b11" diff-visibility="full" variant="default" view-coords="76.0,32.5,94.4,46.3" aspect-ratio="1.405" } Added LED connected to GPIO25
Review

@RevaReviewa , can you take a look at this new BOOTSEL switch?

!thumbnail[](RPI-PICO-R3-PUBLIC.DSN){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" doc-id="67612bb56aa7d3a48b11" diff-visibility="full" variant="default" view-coords="6.6,26.5,32.0,52.7" aspect-ratio="1.405" } @RevaReviewa , can you take a look at this new BOOTSEL switch?
Review

It looks great. Thank you for using the reference design from the library!

It looks great. Thank you for using the reference design from the library!
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Review

@daniel-allspice why did you add this diode?

!thumbnail[](RPI-PICO-R3-PUBLIC.DSN){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...b0d764f6a36b18d467021a4ffdd30a93ac150476" pr="1" doc-id="67612bb56aa7d3a48b11" diff-visibility="full" variant="default" view-coords="22.8,8.6,31.1,15.5" aspect-ratio="1.405" } @daniel-allspice why did you add this diode?
Review

@daniel-allspice Could you please verify the resistor divider is correct.

!thumbnail[](RPI-PICO-R3-PUBLIC.DSN){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...b0d764f6a36b18d467021a4ffdd30a93ac150476" pr="1" doc-id="67612bb56aa7d3a48b11" diff-visibility="full" variant="default" view-coords="18.1,8.0,31.1,26.9" aspect-ratio="1.405" } @daniel-allspice Could you please verify the resistor divider is correct.

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LOADING design file
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@AllSpiceAlice, mechanical review complete. No change to board outline, or mounting features. All new components (and old components) are below the height limit. It think it's ready!

@AllSpiceAlice, mechanical review complete. No change to board outline, or mounting features. All new components (and old components) are below the height limit. It think it's ready! !thumbnail[](RPI-PICO-R3a-PUBLIC.brd){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" layers="81,82,1,32,116,115,111,67,66,42,41,65,64,40,37,38,35,36,110,109,108,107,33,34,58,57,106,105,104,103" diff-visibility="full" variant="default" view-coords="2.3,1.3,96.9,99.0" aspect-ratio="0.510" }
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Thank you for removing the alternate crystal footprint.

!thumbnail[](RPI-PICO-R3a-PUBLIC.brd){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" layers="81,82,1,32,116,115,111,67,66,42,41,65,64,40,37,38,35,36,110,109,108,107,33,34,58,57,106,105,104,103" diff-visibility="full" variant="default" view-coords="28.3,61.1,63.9,74.4" aspect-ratio="0.510" } Thank you for removing the alternate crystal footprint.

@AllSpiceAlice , the spec for the mounting holes is 2.1mm (± 0.05mm). We're getting reports that the prototypes aren't hitting this spec. Can you check the actual file?

!thumbnail[](RPI-PICO-R3a-PUBLIC.brd){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...d815fc8d16966b6c4b65eb4b0f26d05d4212cde7" pr="1" layers="81,82,1,32,67,66,42,41,65,64,40,37,38,35,36,33,34,57" diff-visibility="full" variant="default" view-coords="23.5,7.0,80.3,17.8" aspect-ratio="0.510" } @AllSpiceAlice , the spec for the mounting holes is 2.1mm (± 0.05mm). We're getting reports that the prototypes aren't hitting this spec. Can you check the actual file?
Review

@daniel Hey do we really need 10mil trace here?

!thumbnail[](RPI-PICO-R3a-PUBLIC.brd){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...b0d764f6a36b18d467021a4ffdd30a93ac150476" pr="1" layers="81,82,1,32,67,66,42,41,65,64,40,37,38,35,36,33,34,57" diff-visibility="full" variant="default" view-coords="13.0,12.5,58.6,27.7" aspect-ratio="0.510" } @daniel Hey do we really need 10mil trace here?
Review

@brendan Can you take a look and review this please?

!thumbnail[](RPI-PICO-R3a-PUBLIC.brd){ diff="AllSpice-Demos/OrCAD-Demo:ad10cfced55b1abdba8d8a1c924de5d19d891bd7...b0d764f6a36b18d467021a4ffdd30a93ac150476" pr="1" layers="81,82,1,32,67,66,42,41,65,64,40,37,38,35,36,33,34,57" diff-visibility="full" variant="default" view-coords="29.7,62.3,63.1,74.5" aspect-ratio="0.510" } @brendan Can you take a look and review this please?