Tubii_Tk2/Parts/parts/ecl/10h124/entity/vhdl.vhd
2015-02-27 19:09:38 -05:00

13 lines
299 B
VHDL

-- generated by newgenasym Thu Jan 08 15:59:36 2015
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity \10h124\ is
port (
COMMON: IN STD_LOGIC;
D: IN STD_LOGIC;
Y: OUT STD_LOGIC;
\y*\: OUT STD_LOGIC);
end \10h124\;