Tubii_Tk2/Parts/parts/ecl/10h125/vlog_model/verilog.v
2015-02-27 19:09:38 -05:00

20 lines
509 B
Verilog

// generated by genview Fri Jan 16 22:09:48 1998
`timescale 1ns/100ps
module \10h125 (a, \b* , v, y);
parameter size = 1;
parameter VBBAIN = "VBBAIN";
parameter VBBAIN_ = "VBBAIN_";
input [size-1:0] a;
input [size-1:0] \b* ;
output [size-1:0] y;
output v;
MC10H125P #(VBBAIN, VBBAIN_) inst1[size-1:0] (/*.VBB*/ v ,
/*.AIN_*/ \b* ,
/*.AIN*/ a,
/*.AOUT*/ y );
endmodule