57 lines
1.6 KiB
Verilog
57 lines
1.6 KiB
Verilog
/*
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* Created: < wittich 04/08/95>
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* Time-stamp: <95/10/27 17:46:55 wittich>
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* filename: /tape/snopcb/snolib_fec32/euroconn/verilog_lib/verilog.v
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*
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* Comments: verilog model for 90 pin connector. Simple pass-through.
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*
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* Modification History:
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* ------------------------------
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* 04/08/95 Created. PW.
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* 21/09/95 nuked. back to one-sided conn
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* 05/10/95 updated for 165 pinn connector
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* 27/10/95 updated for euroconn connector.
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*/
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module EUROCONN
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(A1, A2, A3, A4, A5, A6, A7,A8, A9, A10,
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A11, A12, A13, A14, A15, A16, A17,A18, A19, A20,
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A21, A22, A23, A24, A25, A26, A27,A28, A29, A30,
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A31, A32,B1, B2, B3, B4, B5, B6, B7,B8, B9, B10,
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B11, B12, B13, B14, B15, B16, B17,B18, B19, B20,
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B21, B22, B23, B24, B25, B26, B27,B28, B29, B30,
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B31, B32, C1, C2, C3, C4, C5, C6, C7,C8, C9, C10,
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C11, C12, C13, C14, C15, C16, C17,C18, C19, C20,
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C21, C22, C23, C24, C25, C26, C27,C28, C29, C30,
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C31, C32);
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inout A1, A2, A3, A4, A5, A6, A7,
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A8, A9, A10;
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inout A11, A12, A13, A14, A15, A16, A17,
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A18, A19, A20;
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inout A21, A22, A23, A24, A25, A26, A27,
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A28, A29, A30;
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inout A31, A32;
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inout B1, B2, B3, B4, B5, B6, B7,
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B8, B9, B10;
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inout B11, B12, B13, B14, B15, B16, B17,
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B18, B19, B20;
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inout B21, B22, B23, B24, B25, B26, B27,
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B28, B29, B30;
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inout B31, B32;
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inout C1, C2, C3, C4, C5, C6, C7,
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C8, C9, C10;
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inout C11, C12, C13, C14, C15, C16, C17,
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C18, C19, C20;
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inout C21, C22, C23, C24, C25, C26, C27,
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C28, C29, C30;
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inout C31, C32;
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endmodule /* EUROCONN */
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