14 lines
329 B
VHDL
14 lines
329 B
VHDL
-- generated by newgenasym Wed Oct 29 14:53:51 2014
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity ad8009 is
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port (
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\in+\: INOUT STD_LOGIC;
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\in-\: INOUT STD_LOGIC;
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OUTPUT: INOUT STD_LOGIC;
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\v+\: IN STD_LOGIC;
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\v-\: IN STD_LOGIC);
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end ad8009;
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