20 lines
289 B
Verilog
20 lines
289 B
Verilog
// generated by newgenasym Mon Mar 02 15:48:32 2015
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module ds90lv027 (d1, d2, gnd, q1, \q1* , q2, \q2* , vcc);
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input d1;
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input d2;
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input gnd;
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output q1;
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output \q1* ;
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output q2;
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output \q2* ;
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input vcc;
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initial
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begin
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end
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endmodule
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