105 lines
3.3 KiB
VHDL
105 lines
3.3 KiB
VHDL
-- generated by newgenasym Mon Oct 4 14:13:30 2010
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity EUROCONN is
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port (
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A1: INOUT STD_LOGIC;
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A10: INOUT STD_LOGIC;
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A11: INOUT STD_LOGIC;
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A12: INOUT STD_LOGIC;
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A13: INOUT STD_LOGIC;
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A14: INOUT STD_LOGIC;
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A15: INOUT STD_LOGIC;
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A16: INOUT STD_LOGIC;
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A17: INOUT STD_LOGIC;
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A18: INOUT STD_LOGIC;
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A19: INOUT STD_LOGIC;
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A2: INOUT STD_LOGIC;
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A20: INOUT STD_LOGIC;
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A21: INOUT STD_LOGIC;
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A22: INOUT STD_LOGIC;
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A23: INOUT STD_LOGIC;
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A24: INOUT STD_LOGIC;
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A25: INOUT STD_LOGIC;
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A26: INOUT STD_LOGIC;
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A27: INOUT STD_LOGIC;
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A28: INOUT STD_LOGIC;
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A29: INOUT STD_LOGIC;
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A3: INOUT STD_LOGIC;
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A30: INOUT STD_LOGIC;
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A31: INOUT STD_LOGIC;
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A32: INOUT STD_LOGIC;
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A4: INOUT STD_LOGIC;
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A5: INOUT STD_LOGIC;
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A6: INOUT STD_LOGIC;
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A7: INOUT STD_LOGIC;
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A8: INOUT STD_LOGIC;
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A9: INOUT STD_LOGIC;
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B1: INOUT STD_LOGIC;
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B10: INOUT STD_LOGIC;
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B11: INOUT STD_LOGIC;
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B12: INOUT STD_LOGIC;
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B13: INOUT STD_LOGIC;
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B14: INOUT STD_LOGIC;
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B15: INOUT STD_LOGIC;
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B16: INOUT STD_LOGIC;
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B17: INOUT STD_LOGIC;
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B18: INOUT STD_LOGIC;
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B19: INOUT STD_LOGIC;
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B2: INOUT STD_LOGIC;
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B20: INOUT STD_LOGIC;
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B21: INOUT STD_LOGIC;
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B22: INOUT STD_LOGIC;
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B23: INOUT STD_LOGIC;
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B24: INOUT STD_LOGIC;
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B25: INOUT STD_LOGIC;
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B26: INOUT STD_LOGIC;
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B27: INOUT STD_LOGIC;
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B28: INOUT STD_LOGIC;
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B29: INOUT STD_LOGIC;
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B3: INOUT STD_LOGIC;
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B30: INOUT STD_LOGIC;
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B31: INOUT STD_LOGIC;
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B32: INOUT STD_LOGIC;
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B4: INOUT STD_LOGIC;
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B5: INOUT STD_LOGIC;
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B6: INOUT STD_LOGIC;
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B7: INOUT STD_LOGIC;
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B8: INOUT STD_LOGIC;
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B9: INOUT STD_LOGIC;
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C1: INOUT STD_LOGIC;
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C10: INOUT STD_LOGIC;
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C11: INOUT STD_LOGIC;
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C12: INOUT STD_LOGIC;
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C13: INOUT STD_LOGIC;
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C14: INOUT STD_LOGIC;
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C15: INOUT STD_LOGIC;
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C16: INOUT STD_LOGIC;
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C17: INOUT STD_LOGIC;
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C18: INOUT STD_LOGIC;
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C19: INOUT STD_LOGIC;
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C2: INOUT STD_LOGIC;
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C20: INOUT STD_LOGIC;
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C21: INOUT STD_LOGIC;
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C22: INOUT STD_LOGIC;
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C23: INOUT STD_LOGIC;
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C24: INOUT STD_LOGIC;
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C25: INOUT STD_LOGIC;
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C26: INOUT STD_LOGIC;
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C27: INOUT STD_LOGIC;
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C28: INOUT STD_LOGIC;
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C29: INOUT STD_LOGIC;
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C3: INOUT STD_LOGIC;
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C30: INOUT STD_LOGIC;
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C31: INOUT STD_LOGIC;
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C32: INOUT STD_LOGIC;
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C4: INOUT STD_LOGIC;
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C5: INOUT STD_LOGIC;
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C6: INOUT STD_LOGIC;
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C7: INOUT STD_LOGIC;
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C8: INOUT STD_LOGIC;
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C9: INOUT STD_LOGIC);
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end EUROCONN;
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