16 lines
210 B
Verilog
16 lines
210 B
Verilog
// generated by newgenasym Mon Jul 14 16:03:19 2014
|
|
|
|
|
|
module hc574f (ck, d, \oe* , q);
|
|
input ck;
|
|
input [7:0] d;
|
|
output \oe* ;
|
|
output [7:0] q;
|
|
|
|
|
|
initial
|
|
begin
|
|
end
|
|
|
|
endmodule
|