Tubii_Tk2/Parts/parts/misc/hc574f/entity/vhdl.vhd
2015-02-27 19:09:38 -05:00

13 lines
335 B
VHDL

-- generated by newgenasym Mon Jul 14 16:03:19 2014
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity hc574f is
port (
CK: IN STD_LOGIC;
D: IN STD_LOGIC_VECTOR (7 DOWNTO 0);
\oe*\: OUT STD_LOGIC;
Q: OUT STD_LOGIC_VECTOR (7 DOWNTO 0));
end hc574f;