Tubii_Tk2/Parts/parts/misc/ids_c10/entity/vhdl.vhd
2015-02-27 19:09:38 -05:00

19 lines
501 B
VHDL

-- generated by newgenasym Thu Feb 05 11:24:52 2015
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity ids_c10 is
port (
PIN1: INOUT STD_LOGIC;
PIN10: INOUT STD_LOGIC;
PIN2: INOUT STD_LOGIC;
PIN3: INOUT STD_LOGIC;
PIN4: INOUT STD_LOGIC;
PIN5: INOUT STD_LOGIC;
PIN6: INOUT STD_LOGIC;
PIN7: INOUT STD_LOGIC;
PIN8: INOUT STD_LOGIC;
PIN9: INOUT STD_LOGIC);
end ids_c10;