Tubii_Tk2/Parts/parts/misc/led_1206/entity/verilog.v
2015-02-27 19:09:38 -05:00

14 lines
156 B
Verilog

// generated by newgenasym Mon Sep 13 13:50:27 2010
module led_1206 (a, b);
inout a;
inout b;
initial
begin
end
endmodule