11 lines
233 B
VHDL
11 lines
233 B
VHDL
-- generated by newgenasym Mon Sep 13 13:50:11 2010
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity led_small is
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port (
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AN: INOUT STD_LOGIC;
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CAT: INOUT STD_LOGIC);
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end led_small;
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