17 lines
433 B
VHDL
17 lines
433 B
VHDL
-- generated by newgenasym Thu Oct 16 19:05:30 2014
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity max9376 is
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port (
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IN1: INOUT STD_LOGIC;
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\in1*\: IN STD_LOGIC;
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IN2: IN STD_LOGIC;
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\in2*\: IN STD_LOGIC;
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OUT1: OUT STD_LOGIC;
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\out1*\: OUT STD_LOGIC;
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OUT2: OUT STD_LOGIC;
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\out2*\: OUT STD_LOGIC);
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end max9376;
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