12 lines
267 B
VHDL
12 lines
267 B
VHDL
-- generated by newgenasym Thu May 28 17:05:00 2009
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity MC7805K_L is
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port (
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AN: IN STD_LOGIC;
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CAT: OUT STD_LOGIC;
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REF: INOUT STD_LOGIC);
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end MC7805K_L;
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