17 lines
233 B
Verilog
17 lines
233 B
Verilog
// generated by newgenasym Tue Feb 8 12:24:07 2011
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module smbconn (pin1, pin3, pin5, pin7, pin9);
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inout pin1;
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input pin3;
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input pin5;
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input pin7;
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input pin9;
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initial
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begin
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end
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endmodule
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