Tubii_Tk2/Parts/parts/misc/smbconn/entity/verilog.v
2015-02-27 19:09:38 -05:00

17 lines
233 B
Verilog

// generated by newgenasym Tue Feb 8 12:24:07 2011
module smbconn (pin1, pin3, pin5, pin7, pin9);
inout pin1;
input pin3;
input pin5;
input pin7;
input pin9;
initial
begin
end
endmodule