17 lines
243 B
Verilog
17 lines
243 B
Verilog
// generated by newgenasym Wed Oct 08 10:54:00 2014
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module ths3062 (\in+ , \in- , out, \vcc+ , \vcc- );
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inout \in+ ;
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inout \in- ;
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inout out;
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input \vcc+ ;
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input \vcc- ;
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initial
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begin
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end
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endmodule
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