12 lines
263 B
VHDL
12 lines
263 B
VHDL
-- generated by newgenasym Tue Apr 05 20:13:50 2011
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity mmbth10 is
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port (
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B: INOUT STD_LOGIC;
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C: INOUT STD_LOGIC;
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E: INOUT STD_LOGIC);
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end mmbth10;
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