ac5895baa3
Something is wrong with the translation block symbol. I'm gonna try and fix it without deleting everything but this commit is just in case i fuck that up
15 lines
170 B
Verilog
15 lines
170 B
Verilog
// generated by newgenasym Wed Mar 04 17:06:07 2015
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module mpsh81 (b, c, e);
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inout b;
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inout c;
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inout e;
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initial
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begin
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end
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endmodule
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