24 lines
375 B
Verilog
24 lines
375 B
Verilog
// generated by newgenasym Fri Sep 17 14:15:51 2010
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module \74f14 (i0, i1, i2, i3, i4, i5, \o0* , \o1* , \o2* , \o3* , \o4* , \o5* );
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input i0;
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input i1;
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input i2;
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input i3;
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input i4;
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input i5;
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input \o0* ;
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input \o1* ;
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input \o2* ;
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input \o3* ;
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input \o4* ;
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input \o5* ;
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initial
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begin
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end
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endmodule
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