102 lines
3.0 KiB
Plaintext
102 lines
3.0 KiB
Plaintext
(marker_file
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(version 1.0)
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(markers
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(
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(tool "Concept")
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(class "SCHEMATIC")
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(severity 40)
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(error_num 1)
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(short_msg "ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.")
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(long_msg "Severity : Error (Concept)
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Description : ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.
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Port name: clk100_n
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clock_ports\entity\verilog.v
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Object dump:
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{
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}
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{
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port name: clk100_n
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}
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")
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(location
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(
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(object_kind "ThisCellView")
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(canonical_name ";;;")
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(parent_canonical_name "CONCEPT")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal clk100_n;")
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(parent_canonical_name "DRAWERROR NET clk100_n")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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)
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)
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(
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(tool "Concept")
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(class "SCHEMATIC")
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(severity 40)
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(error_num 2)
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(short_msg "ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.")
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(long_msg "Severity : Error (Concept)
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Description : ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.
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Port name: clk100_p
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clock_ports\entity\verilog.v
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Object dump:
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{
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}
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{
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port name: clk100_p
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}
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")
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(location
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(
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(object_kind "ThisCellView")
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(canonical_name ";;;")
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(parent_canonical_name "CONCEPT")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal clk100_p;")
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(parent_canonical_name "DRAWERROR NET clk100_p")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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)
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)
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(
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(tool "Concept")
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(class "SCHEMATIC")
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(severity 40)
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(error_num 3)
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(short_msg "ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.")
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(long_msg "Severity : Error (Concept)
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Description : ERROR(SPCOCD-171): Port exists in symbol but not in the schematic. Either delete this port from the symbol or add this port in the schematic.
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Port name: tub_clk_in
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Entity file location: C:\Users\QGPWindowsVB\Documents\ANUSTART\worklib\clock_ports\entity\verilog.v
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Object dump:
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{
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}
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{
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port name: tub_clk_in
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}
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")
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(location
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(
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(object_kind "ThisCellView")
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(canonical_name ";;;")
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(parent_canonical_name "CONCEPT")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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(
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(object_kind "ThisEntityPort")
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(canonical_name "_!drawerror signal tub_clk_in;")
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(parent_canonical_name "DRAWERROR NET tub_clk_in")
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(drawing_name "@tubii_tk2_lib.clock_ports(sch_1):page1")
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)
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)
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)
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)
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)
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