ac5895baa3
Something is wrong with the translation block symbol. I'm gonna try and fix it without deleting everything but this commit is just in case i fuck that up
815 lines
18 KiB
Plaintext
815 lines
18 KiB
Plaintext
(
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(version 16.6)
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(tool
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(creator "conceptHDL")
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(last "conceptHDL")
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)
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(library "tubii_tk2_lib")
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(design "translation"
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(lastIds
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(lastInstanceId 29)
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(lastNetId 41)
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(lastInstTermId 152)
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)
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(cells
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("S2" "ttl_ecl" "tubii_tk2_lib" "sym_1"
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(terms
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("T1" "ecl_in_n" -1 -1 1)
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("T2" "ecl_in_p" -1 -1 1)
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("T3" "ecl_out_n" -1 -1 2)
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("T4" "ecl_out_p" -1 -1 2)
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("T5" "ttl_in" -1 -1 1)
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("T6" "ttl_out" -1 -1 2)
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)
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)
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("S3" "lvds_ecl" "tubii_tk2_lib" "sym_1"
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)
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("S4" "nim_ecl" "tubii_tk2_lib" "sym_1"
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)
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("S6" "csmd0805" "capacitors" "sym_1"
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(terms
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("T25" "a" 0 0 1)
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("T26" "b" 0 0 2)
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)
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)
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("S7" "mc10h125" "ecl" "sym_1"
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(terms
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("T27" "d1" -1 -1 1)
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("T28" "d1*" -1 -1 1)
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("T29" "d2" -1 -1 1)
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("T30" "d2*" -1 -1 1)
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("T31" "d3" -1 -1 1)
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("T32" "d3*" -1 -1 1)
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("T33" "d4" -1 -1 1)
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("T34" "d4*" -1 -1 1)
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("T35" "gnd" -1 -1 1)
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("T36" "q1" -1 -1 2)
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("T37" "q2" -1 -1 2)
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("T38" "q3" -1 -1 2)
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("T39" "q4" -1 -1 2)
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("T40" "vbb" -1 -1 2)
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("T41" "vcc" -1 -1 1)
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("T42" "vee" -1 -1 1)
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)
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)
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("S8" "mc10h124" "ecl" "sym_1"
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(terms
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("T43" "a_in" -1 -1 1)
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("T44" "a_out" -1 -1 2)
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("T45" "a_out*" -1 -1 2)
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("T46" "b_in" -1 -1 1)
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("T47" "b_out" -1 -1 2)
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("T48" "b_out*" -1 -1 2)
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("T49" "c_in" -1 -1 1)
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("T50" "c_out" -1 -1 2)
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("T51" "c_out*" -1 -1 2)
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("T52" "common" -1 -1 1)
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("T53" "d_in" -1 -1 1)
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("T54" "d_out" -1 -1 2)
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("T55" "d_out*" -1 -1 2)
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("T56" "gnd" -1 -1 1)
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("T57" "vcc" -1 -1 1)
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("T58" "vee" -1 -1 1)
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)
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)
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("S9" "ds90lv019" "misc" "sym_1"
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(terms
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("T59" "de" -1 -1 1)
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("T60" "din" -1 -1 1)
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("T61" "dout" -1 -1 2)
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("T62" "dout*" -1 -1 2)
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("T63" "gnd" -1 -1 1)
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("T64" "re" -1 -1 1)
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("T65" "ri" -1 -1 1)
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("T66" "ri*" -1 -1 1)
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("T67" "rout" -1 -1 2)
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("T68" "vcc" -1 -1 1)
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)
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)
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("S10" "mpsh81" "transistors" "sym_1"
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(terms
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("T72" "b" -1 -1 3)
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("T73" "c" -1 -1 3)
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("T74" "e" -1 -1 3)
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)
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)
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("S11" "rsmd0805" "resistors" "sym_1"
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(terms
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("T75" "a" 0 0 1)
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("T76" "b" 0 0 2)
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)
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)
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("S12" "mmbth10" "transistors" "sym_1"
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(terms
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("T77" "b" -1 -1 3)
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("T78" "c" -1 -1 3)
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("T79" "e" -1 -1 3)
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)
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)
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("S13" "mc10e116" "ecl" "sym_1"
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(terms
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("T80" "d0" -1 -1 1)
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("T81" "d0*" -1 -1 1)
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("T82" "d1" -1 -1 1)
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("T83" "d1*" -1 -1 1)
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("T84" "d2" -1 -1 1)
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("T85" "d2*" -1 -1 1)
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("T86" "d3" -1 -1 1)
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("T87" "d3*" -1 -1 1)
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("T88" "d4" -1 -1 1)
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("T89" "d4*" -1 -1 1)
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("T90" "gnd0" -1 -1 1)
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("T91" "gnd1" -1 -1 1)
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("T92" "gnd2" -1 -1 1)
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("T93" "gnd3" -1 -1 1)
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("T94" "gnd4" -1 -1 1)
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("T95" "gnd5" -1 -1 1)
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("T96" "q0" -1 -1 2)
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("T97" "q0*" -1 -1 2)
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("T98" "q1" -1 -1 2)
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("T99" "q1*" -1 -1 2)
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("T100" "q2" -1 -1 2)
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("T101" "q2*" -1 -1 2)
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("T102" "q3" -1 -1 2)
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("T103" "q3*" -1 -1 2)
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("T104" "q4" -1 -1 2)
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("T105" "q4*" -1 -1 2)
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("T106" "vbb" -1 -1 2)
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("T107" "vee" -1 -1 1)
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)
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)
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("S14" "csmd0603" "capacitors" "sym_1"
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(terms
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("T108" "a" 0 0 1)
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("T109" "b" 0 0 2)
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)
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)
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)
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(nets
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("N5" "lvds_to_ecl_out_n" -1 -1 1 2)
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("N6" "lvds_to_ecl_out_p" -1 -1 1 2)
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("N7" "unnamed_1_csmd0805_i10_a" -1 -1 0 )
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("N8" "unnamed_1_csmd0805_i10_b" -1 -1 0 )
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("N9" "unnamed_1_csmd0805_i13_a" -1 -1 0 )
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("N10" "unnamed_1_csmd0805_i13_b" -1 -1 0 )
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("N11" "unnamed_1_csmd0805_i14_b" -1 -1 0 )
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("N12" "unnamed_1_csmd0805_i9_b" -1 -1 0 )
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("N13" "unnamed_1_ds90lv019_i15_rout" -1 -1 0 )
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("N16" "ecl_to_lvds_in" -1 -1 1 1)
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("N17" "ecl_to_lvds_out_n" -1 -1 1 2)
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("N18" "ecl_to_lvds_out_p" -1 -1 1 2)
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("N19" "ecl_to_nim_in" -1 -1 1 1)
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("N20" "ecl_to_ttl_in" -1 -1 1 1)
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("N21" "ecl_to_ttl_out" -1 -1 1 2)
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("N22" "lvds_to_ecl_in_n" -1 -1 1 1)
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("N23" "lvds_to_ecl_in_p" -1 -1 1 1)
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("N24" "ttl_to_ecl_in" -1 -1 1 1)
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("N25" "ttl_to_ecl_out_n" -1 -1 1 2)
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("N26" "ttl_to_ecl_out_p" -1 -1 1 2)
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("N27" "unnamed_1_ds90lv019_i15_din" -1 -1 0 )
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("N28" "ecl_to_nim_out" -1 -1 1 2)
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("N29" "nim_to_ecl_in" -1 -1 1 1)
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("N30" "nim_to_ecl_out" -1 -1 1 2)
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("N31" "unnamed_1_mc10e116_i30_d0" -1 -1 0 )
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("N32" "unnamed_1_mc10e116_i30_d3" -1 -1 0 )
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("N33" "unnamed_1_mc10e116_i30_q0" -1 -1 0 )
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("N34" "unnamed_1_mc10e116_i30_q0_1" -1 -1 0 )
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("N35" "unnamed_1_mc10e116_i30_q1" -1 -1 0 )
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("N36" "unnamed_1_mc10e116_i30_q1_1" -1 -1 0 )
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("N37" "unnamed_1_mc10e116_i30_q2" -1 -1 0 )
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("N38" "unnamed_1_mpsh81_i17_c" -1 -1 0 )
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("N4" "gnd" -1 -1 2 )
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("N15" "vcc" -1 -1 2 )
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("N40" "vee" -1 -1 2 )
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("N41" "vtt" -1 -1 2 )
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)
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(instances
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("I1" "page1_i1" "S2"
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(pins
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("M1" "T1" -1 -1
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)
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("M2" "T2" -1 -1
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)
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("M3" "T3" -1 -1
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)
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("M4" "T4" -1 -1
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)
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("M5" "T5" -1 -1
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)
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("M6" "T6" -1 -1
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)
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)
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)
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("I2" "page1_i2" "S3"
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)
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("I3" "page1_i3" "S4"
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)
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("I6" "page1_i9" "S6"
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(pins
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("M39" "T25" 0 0
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(conn
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("0" 0 0 "N8" -1 -1)
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)
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)
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("M40" "T26" 0 0
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(conn
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("0" 0 0 "N12" -1 -1)
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)
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)
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)
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)
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("I7" "page1_i10" "S6"
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(pins
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("M41" "T25" 0 0
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(conn
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("0" 0 0 "N7" -1 -1)
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)
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)
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("M42" "T26" 0 0
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(conn
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("0" 0 0 "N8" -1 -1)
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)
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)
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)
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)
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("I8" "page1_i11" "S7"
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(pins
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("M43" "T27" -1 -1
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(conn
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("0" -1 -1 "N33" -1 -1)
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)
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)
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("M44" "T28" -1 -1
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(conn
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("0" -1 -1 "N34" -1 -1)
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)
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)
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("M45" "T29" -1 -1
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(conn
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("0" -1 -1 "N36" -1 -1)
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)
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)
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("M46" "T30" -1 -1
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(conn
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("0" -1 -1 "N35" -1 -1)
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)
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)
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("M47" "T31" -1 -1
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)
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("M48" "T32" -1 -1
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)
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("M49" "T33" -1 -1
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)
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("M50" "T34" -1 -1
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)
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("M51" "T35" -1 -1
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(conn
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("0" -1 -1 "N8" -1 -1)
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)
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)
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("M52" "T36" -1 -1
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(conn
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("0" -1 -1 "N21" -1 -1)
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)
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)
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("M53" "T37" -1 -1
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(conn
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("0" -1 -1 "N27" -1 -1)
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)
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)
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("M54" "T38" -1 -1
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)
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("M55" "T39" -1 -1
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)
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("M56" "T40" -1 -1
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)
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("M57" "T41" -1 -1
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(conn
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("0" -1 -1 "N12" -1 -1)
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)
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)
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("M58" "T42" -1 -1
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(conn
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("0" -1 -1 "N7" -1 -1)
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)
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)
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)
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)
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("I9" "page1_i12" "S8"
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(pins
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("M59" "T43" -1 -1
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(conn
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("0" -1 -1 "N24" -1 -1)
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)
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)
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("M60" "T44" -1 -1
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(conn
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("0" -1 -1 "N26" -1 -1)
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)
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)
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("M61" "T45" -1 -1
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(conn
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("0" -1 -1 "N25" -1 -1)
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)
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)
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("M62" "T46" -1 -1
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(conn
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("0" -1 -1 "N13" -1 -1)
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)
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)
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("M63" "T47" -1 -1
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(conn
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("0" -1 -1 "N6" -1 -1)
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)
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)
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("M64" "T48" -1 -1
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(conn
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("0" -1 -1 "N5" -1 -1)
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)
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)
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("M65" "T49" -1 -1
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)
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("M66" "T50" -1 -1
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)
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("M67" "T51" -1 -1
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)
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("M68" "T52" -1 -1
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(conn
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("0" -1 -1 "N15" -1 -1)
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)
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)
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("M69" "T53" -1 -1
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)
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("M70" "T54" -1 -1
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)
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("M71" "T55" -1 -1
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)
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("M72" "T56" -1 -1
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(conn
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("0" -1 -1 "N10" -1 -1)
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)
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)
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("M73" "T57" -1 -1
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(conn
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("0" -1 -1 "N9" -1 -1)
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)
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)
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("M74" "T58" -1 -1
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(conn
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("0" -1 -1 "N11" -1 -1)
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)
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)
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)
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)
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("I10" "page1_i13" "S6"
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(pins
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("M75" "T25" 0 0
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(conn
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("0" 0 0 "N9" -1 -1)
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)
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)
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("M76" "T26" 0 0
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(conn
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("0" 0 0 "N10" -1 -1)
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)
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)
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)
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)
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("I11" "page1_i14" "S6"
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(pins
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("M77" "T25" 0 0
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(conn
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("0" 0 0 "N10" -1 -1)
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)
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)
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("M78" "T26" 0 0
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(conn
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("0" 0 0 "N11" -1 -1)
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)
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)
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)
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)
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("I12" "page1_i15" "S9"
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(pins
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("M79" "T59" -1 -1
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(conn
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("0" -1 -1 "N15" -1 -1)
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)
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)
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("M80" "T60" -1 -1
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(conn
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("0" -1 -1 "N27" -1 -1)
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)
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)
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("M81" "T61" -1 -1
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(conn
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("0" -1 -1 "N18" -1 -1)
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)
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)
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("M82" "T62" -1 -1
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(conn
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("0" -1 -1 "N17" -1 -1)
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)
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)
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("M83" "T63" -1 -1
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(conn
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("0" -1 -1 "N4" -1 -1)
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)
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)
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("M84" "T64" -1 -1
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(conn
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("0" -1 -1 "N4" -1 -1)
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)
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)
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("M85" "T65" -1 -1
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(conn
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("0" -1 -1 "N23" -1 -1)
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)
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)
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("M86" "T66" -1 -1
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(conn
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("0" -1 -1 "N22" -1 -1)
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)
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)
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("M87" "T67" -1 -1
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(conn
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("0" -1 -1 "N13" -1 -1)
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)
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)
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("M88" "T68" -1 -1
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(conn
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("0" -1 -1 "N15" -1 -1)
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)
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)
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)
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)
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("I13" "page1_i16" "S6"
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(pins
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("M89" "T25" 0 0
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(conn
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("0" 0 0 "N4" -1 -1)
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)
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)
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("M90" "T26" 0 0
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(conn
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("0" 0 0 "N15" -1 -1)
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)
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)
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)
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)
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("I14" "page1_i17" "S10"
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(pins
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("M93" "T72" -1 -1
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(conn
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("0" -1 -1 "N37" -1 -1)
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)
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)
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("M94" "T73" -1 -1
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(conn
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("0" -1 -1 "N38" -1 -1)
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)
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)
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("M95" "T74" -1 -1
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(conn
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("0" -1 -1 "N28" -1 -1)
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)
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)
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)
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)
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("I15" "page1_i18" "S11"
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(pins
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("M96" "T75" 0 0
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(conn
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("0" 0 0 "N40" -1 -1)
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