Tubii_Tk2/worklib/tubii/physical/perf_advisor.log,3

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* Performance checking for design C:/Users/QGPWindowsVB/Documents/ANUSTART/worklib/tubii/physical/TubiiPCB_V6.brd
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Ratsnest schedule check
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* VCC15M net has VOLTAGE property, suggest adding NO_RAT property.
* VCC15 net has VOLTAGE property, suggest adding NO_RAT property.
* V3P3 net has VOLTAGE property, suggest adding NO_RAT property.
* VCC24M net has VOLTAGE property, suggest adding NO_RAT property.
* VCC24 net has VOLTAGE property, suggest adding NO_RAT property.
* VTT net has VOLTAGE property, suggest adding NO_RAT property.
* VEE net has VOLTAGE property, suggest adding NO_RAT property.
* VCC net has VOLTAGE property, suggest adding NO_RAT property.
* GND net has VOLTAGE property, suggest adding NO_RAT property.
DRC checks
----------------------
* OK.
Constraint region check
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* OK.
Dynamic shape check
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* Dynamic shape has a large number of edges (75).
Suggest re-entering shape.
ISSUE: Attempts to detect shapes that might have been changed from
static to dynamic. Large number of edges leads to quality
of voiding and performance issues.
shape/region location: (2575.0 4250.0)
layer: BOUNDARY/VEE
Sector table check
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* OK.
Constraint set check
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* OK.
NODRC_SYM_SAME_PIN check
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* OK.
Cross section check for bad dielectric constant values
--------------------------------------------------------
* OK.
Padstack size check
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* OK.
Conductor line check
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* OK.
Design Constraints Statistics
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Physical csets = 1
Spacing csets = 2
Same net csets = 1
Electrical csets = 0
Other csets = 0
Total csets === 4
Cset relation table = 0
Constraint regions = 0
Constraint shapes = 0
* OK.
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SUMMARY
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10 problems found. 0 maintenance problems found.