David Cussans ae0026903a Locally changed files. I can't remember why I created v227 but netlist seems identical to v226 and matches schematic

2025-08-19 17:19:12 +01:00

..

adw

Changed R60 to correct 2.5V voltage (was 3.3V with previous value

2025-03-07 10:55:37 +00:00

archive_libs

Added LEDs to front_panel_jtag_serial design. Exported to PCB

2025-02-13 13:36:51 +00:00

atcs/led#20red#200603_0

Pushing files flagged as changed by GIT

2025-02-10 15:19:29 +00:00

Concepthdl.exe346066187

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2025-02-10 15:19:29 +00:00

Concepthdl.exe1012187968

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2025-02-10 15:19:29 +00:00

default

Removing front_panel_ethernet_jtag_serial design. We won't ever use it...

2025-02-13 13:38:14 +00:00

diode/diode

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2025-02-10 15:19:29 +00:00

discrete/r

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2025-02-10 15:19:29 +00:00

golden_symbols/2#2dpin_jumper/sym_1

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2025-02-10 15:19:29 +00:00

graphics

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2025-02-10 15:19:29 +00:00

images0

Adding the cadence files converted by Elgris

2023-01-05 14:28:39 +00:00

ind/ind

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2025-02-10 15:19:29 +00:00

mtca_interface_board

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2025-02-10 15:19:29 +00:00

mtca_interface_board_reocc

Locally changed files. I can't remember why I created v227 but netlist seems identical to v226 and matches schematic

2025-08-19 17:19:12 +01:00

ocad_parts_lib

Added LEDs to front_panel_jtag_serial design. Exported to PCB

2025-02-13 13:36:51 +00:00

temp

Locally changed files. I can't remember why I created v227 but netlist seems identical to v226 and matches schematic

2025-08-19 17:19:12 +01:00

testpoint/testpoint

Pushing files flagged as changed by GIT

2025-02-10 15:19:29 +00:00

tp_demonstrator/led_0

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2025-02-10 15:19:29 +00:00

cds.lib

Copy standard/alias to archive_libs to avoid error messages from front_panel_jtag_serial project

2025-02-11 17:00:18 +00:00

front_panel_ethernet_jtag_serial.cpm

Exporting to PCB after replacing LEDs

2025-03-07 11:43:13 +00:00

front_panel_jtag_serial.cpm

Added LEDs to front_panel_jtag_serial design. Exported to PCB

2025-02-13 13:36:51 +00:00

mib_tongue2.cpm

Tidied silk on changed components and changed ident from v3 to v3b

2025-03-10 10:55:12 +00:00

timing.cpm

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2025-02-10 15:19:29 +00:00

top_level_signal_names.txt

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2025-02-10 15:19:29 +00:00

top_mib_v3.cpm

Locally changed files. I can't remember why I created v227 but netlist seems identical to v226 and matches schematic

2025-08-19 17:19:12 +01:00

top.cpm

Committing changes - to bve copied to mib_v3

2024-06-11 12:47:10 +01:00

tranz_fpga_module.cpm

Pushing files flagged as changed by GIT

2025-02-10 15:19:29 +00:00