AllSpice-Demos/AllSpice-epaper-demo
24
Fork 0
generated from AllSpice-Demos/AllSpice-Altium-template-repo
Files Issues 19 Design Reviews 1 Actions NEW Releases Wiki Activity

Initial Development #26

Open
allspice-kyle wants to merge 44 commits from develop into main
pull from: develop
merge into: AllSpice-Demos:main
Conversation 0 Commits 44 Files Changed 14 +274 -11
allspice-kyle commented 2023-11-04 15:07:32 +00:00
Owner
Copy Link

Depends on AllSpice/AllSpice-Demo-PCB#24
Depends on AllSpice/AllSpice-Demo-Library#23

Resolved Issues

Closes #1
Closes #2
Closes #3
Closes #4

Description

The goal of this review is to:

To Do

Design Review Checklist

Process

  • Schematic and PCB file names follow standard
  • Export necessary review files (3D model, BOM, etc.)
  • Update relevant system architecture documents
  • Update project README page
  • Simulations uploaded and outputs explained

System

  • Power
    • Sufficient power supplied from upstream source
    • Supply rated for necessary country specifications
    • Estimated total worst-case power supply draw
  • Connectors
    • I/Os are specified
    • Sufficient Current and Voltage rating
    • Mating connectors have matching pinout
    • Same contact material specified for mating connectors
  • Testing
    • Test procedure written
  • Environmental
    • Specified min/max operating temperature
    • Specified min/max storage temperature
    • Specified min/max humidity
  • ROHS compliance requirement review

Components

  • Unpopulated components are denoted DNI
  • Components meet environmental specifications
  • All components have quantity, reference designator and description
  • Suggested and alternate manufacturers listed
  • Price and stock checked for each component
  • Component derating
    • Voltage
    • Current
    • Power at worst-case operating temperature
    • Temperature at worst-case power

Schematics

  • Document
    • Dot on each connection
    • No four-point connections
    • Title block completed for each sheet
    • All components have reference designators and values
    • Multi-part components don't have unplaced symbols
    • Page title present and consistent on all pages if not in title block
    • Symbols identify open collector/drain pins and internal pulled up/down pins
    • Pin names and attributes on symbols with multi-function pins should match actual design usage (I/O/Bi, Name)
    • Components follow preferred reference designator pattern
  • External I/O
    • Filtered for EMI
    • Protected against electrostatic discharge (ESD)
    • Unused inputs terminated
  • Microcontrollers / ICs
    • Predictable or controlled power-up state
      • Reset filtered
    • Sufficient bypass capacitance
    • Oscillators checked for reliable startup
    • Pullups on open-collector pins
    • Logic-low and logic-high voltage levels checked
    • No-connect pins labeled NC
    • Clock lines with series termination and parallel termination component locations present even if not populated; zero ohm resistor for series, unpopulated parts for parallel termination
    • Check for input voltages applied with power off and CMOS latchup possibilities
    • Check the data sheet errata and apnotes for weird IC behaviors
  • Busses
    • UART/USART TX->RX and RX<-TX
    • I2C SDA and SCL pullup with appropriate value per capacitance
    • Setup, hold, access times for data and address busses
  • Analog
    • Sufficient power rails for analog circuits
    • Amplifiers checked for stability
    • Consider signal rate-of-rise and fall for noise radiation
  • General
    • Sufficient bulk capacitance calculated
    • Polarized components checked
    • Electrolytic/tantalum capacitors checked for no reverse voltage
    • Electrolytic/tantalum capacitors temperature/voltage derating sufficient for MTBF
    • Sufficient capacitance on low dropout voltage regulators
    • Sufficient time delays and slew rates for comparators
    • Sufficient common mode input voltage rating on opamps
    • Check pin numbers of all custom-generated parts
    • Check reverse base-emitter current/voltage on bipolar transistors
    • Power nets use preferred and consistent naming (ex. no 3.3V vs +3.3V)
    • Debug resources added by design (leds, serial ports, etc.) even if unpopulated by default

PCB

  • Check outline and size of PCB
Depends on https://hub.allspice.io/AllSpice/AllSpice-Demo-PCB/pulls/24 Depends on https://hub.allspice.io/AllSpice/AllSpice-Demo-Library/issues/23 ## Resolved Issues Closes #1 Closes #2 Closes #3 Closes #4 ## Description The goal of this review is to: - Verify the initial schematic design, which includes: - Epaper series display connector: https://www.waveshare.com/product/displays/e-paper/epaper-3/2.13inch-e-paper-g.htm - Including supporting circuitry - Battery mounting - ESP32 Model included initially as a PCB mounted module: https://esp32s3.com/nanos3.html - Next iteration will embed ESP32 chip and supporting circuitry - Verify rough PCB outline and component placement - Verify initial power budget ## To Do - [ ] #6 - [ ] Supporting circuitry for [e-paper display](https://files.waveshare.com/upload/5/57/2.13inch_e-Paper_HAT_Schematic.pdf) ## Design Review Checklist ### Process - [ ] Schematic and PCB file names follow standard - [ ] Export necessary review files (3D model, BOM, etc.) - [ ] Update relevant system architecture documents - [ ] Update project README page - [ ] Simulations uploaded and outputs explained ### System - [ ] Power - [ ] Sufficient power supplied from upstream source - [ ] Supply rated for necessary country specifications - [ ] Estimated total worst-case power supply draw - [ ] Connectors - [ ] I/Os are specified - [ ] Sufficient Current and Voltage rating - [ ] Mating connectors have matching pinout - [ ] Same contact material specified for mating connectors - [ ] Testing - [ ] Test procedure written - [ ] Environmental - [ ] Specified min/max operating temperature - [ ] Specified min/max storage temperature - [ ] Specified min/max humidity - [ ] ROHS compliance requirement review ### Components - [ ] Unpopulated components are denoted DNI - [ ] Components meet environmental specifications - [ ] All components have quantity, reference designator and description - [ ] Suggested and alternate manufacturers listed - [ ] Price and stock checked for each component - [ ] Component derating - [ ] Voltage - [ ] Current - [ ] Power at worst-case operating temperature - [ ] Temperature at worst-case power ### Schematics - [ ] Document - [ ] Dot on each connection - [ ] No four-point connections - [ ] Title block completed for each sheet - [ ] All components have reference designators and values - [ ] Multi-part components don't have unplaced symbols - [ ] Page title present and consistent on all pages if not in title block - [ ] Symbols identify open collector/drain pins and internal pulled up/down pins - [ ] Pin names and attributes on symbols with multi-function pins should match actual design usage (I/O/Bi, Name) - [ ] Components follow preferred reference designator pattern <!-- Link to spec --> - [ ] External I/O - [ ] Filtered for EMI - [ ] Protected against electrostatic discharge (ESD) - [x] Unused inputs terminated - [ ] Microcontrollers / ICs - [x] Predictable or controlled power-up state - [x] Reset filtered - [x] Sufficient bypass capacitance - [x] Oscillators checked for reliable startup - [ ] Pullups on open-collector pins - [ ] Logic-low and logic-high voltage levels checked - [x] No-connect pins labeled NC - [ ] Clock lines with series termination and parallel termination component locations present even if not populated; zero ohm resistor for series, unpopulated parts for parallel termination - [ ] Check for input voltages applied with power off and CMOS latchup possibilities - [ ] Check the data sheet errata and apnotes for weird IC behaviors - [ ] Busses - [x] UART/USART TX->RX and RX<-TX - [ ] I2C SDA and SCL pullup with appropriate value [per capacitance](https://www.ti.com/lit/an/slva689/slva689.pdf) - [ ] Setup, hold, access times for data and address busses - [ ] Analog - [ ] Sufficient power rails for analog circuits - [ ] Amplifiers checked for stability - [ ] Consider signal rate-of-rise and fall for noise radiation - [ ] General - [ ] Sufficient bulk capacitance calculated - [ ] Polarized components checked - [ ] Electrolytic/tantalum capacitors checked for no reverse voltage - [ ] Electrolytic/tantalum capacitors temperature/voltage derating sufficient for MTBF - [ ] Sufficient capacitance on low dropout voltage regulators - [ ] Sufficient time delays and slew rates for comparators - [ ] Sufficient common mode input voltage rating on opamps - [ ] Check pin numbers of all custom-generated parts - [ ] Check reverse base-emitter current/voltage on bipolar transistors - [ ] Power nets use preferred and consistent naming (ex. no `3.3V` vs `+3.3V`) - [ ] Debug resources added by design (leds, serial ports, etc.) even if unpopulated by default ### PCB - [ ] Check outline and size of PCB
allspice-kyle added 42 commits 2023-11-04 15:07:33 +00:00 
https://hub.allspice.io/AllSpice/AllSpice-Demo-PCB/wiki/Prototype-dev-board-shopping-list
Reviewed-on: AllSpice/AllSpice-Demo-PCB#24
allspice-kyle added 1 commit 2023-11-04 15:45:11 +00:00
AllSpiceAlice added 1 commit 2023-11-04 16:02:06 +00:00
allspice-kyle added a new dependency 2023-11-04 16:20:59 +00:00
#12 [action] Create shopping list for first prototype
This design review doesn't have enough required approvals yet. 0 of 1 official approvals granted.
You are not authorized to merge this pull request.
View command line instructions.

Checkout

From your project repository, check out a new branch and test the changes.
git fetch -u origin develop:develop
git checkout develop
Sign in to join this conversation.
Reviewers
No reviewers
Labels
Clear labels   
bug

Something doesn't work

  
Component

Components

  
Cost

   
dfm

Design for manufacturing consideration

  
documentation

Improvements to supporting documentation

  
eol

End of life component

  
feature

New feature or request

  
firmware

Requires FW attention

  
layout

Requires PCB layout attention

  
mechanical

Requires ME attention

  
priority/1 - idea

Nice to have or idea to capture

  
priority/2 - low

Should be resolved eventually

  
priority/3 - medium

Should be resolved before product launch

  
priority/4 - high

Should be resolved before next release

  
priority/5 - critical

Must be fixed immediately - blocking item

  
Specification
No Label
bug
Component
Cost
dfm
documentation
eol
feature
firmware
layout
mechanical
priority/1 - idea
priority/2 - low
priority/3 - medium
priority/4 - high
priority/5 - critical
Specification
Milestone
Clear milestone
No items
No Milestone
Assignees
Clear assignees
No Assignees
2 Participants
Notifications
Due Date
The due date is invalid or out of range. Please use the format 'yyyy-mm-dd'.

No due date set.

Depends on
#12 [action] Create shopping list for first prototype
AllSpice-Demos/AllSpice-epaper-demo
Reference: AllSpice-Demos/AllSpice-epaper-demo#26
No description provided.
Delete Branch "develop"

Deleting a branch is permanent. Although the deleted branch may continue to exist for a short time before it actually gets removed, it CANNOT be undone in most cases. Continue?