Aleksa Bjelogrlic 1ffa4a65f3 Rev 5 out to fab

2025-04-15 18:13:54 -04:00

..

Fabrication Outputs

Rev 5 out to fab

2025-04-15 18:13:54 -04:00

Thunderscope_Rev5.pretty

DRC Clean

2025-04-15 00:59:28 -04:00

ACQ_FE_VREG.kicad_sch

Added Bottom Silk TP Labels

2025-04-09 19:39:31 -04:00

ADC.kicad_sch

Misc WIP

2025-03-21 23:23:21 -04:00

add_altium_symbol_properties.py

Altium Param Import with Script

2024-11-26 01:16:40 -05:00

add_lib_to_footprint.py

Got multi-channel routing working

2025-03-13 12:47:15 -04:00

CON_PCIe_X4.kicad_sch

Added test points on all shunts that didn't have them

2025-04-08 17:24:26 -04:00

delay tuning.txt

Final review before fab

2025-04-15 14:47:11 -04:00

FE_Channel.kicad_sch

Reversed Channel Order

2025-04-07 13:53:55 -04:00

FE.kicad_sch

Added more test points

2025-04-07 16:19:28 -04:00

fp-info-cache

DRC Clean

2025-04-15 00:59:28 -04:00

fp-lib-table

Kicad Import of Rev 5, still needs polishing

2024-11-25 01:07:03 -05:00

FPGA_Bank_IO.kicad_sch

USR and SYNC LVDS Delay Tuning Complete

2025-04-13 18:14:13 -04:00

FPGA_CFG_MGT.kicad_sch

USR and SYNC LVDS Delay Tuning Complete

2025-04-13 18:14:13 -04:00

FPGA_PWR.kicad_sch

USR and SYNC LVDS Delay Tuning Complete

2025-04-13 18:14:13 -04:00

FPGA_VREG.kicad_sch

USR and SYNC LVDS Delay Tuning Complete

2025-04-13 18:14:13 -04:00

FPGA.kicad_sch

Added more test points

2025-04-07 16:19:28 -04:00

impl_1.csv

Got delay tuner to write to rules file

2025-03-27 18:46:35 -04:00

kicad_delay_tuner.py

Skew Matched PCIe Traces

2025-04-11 00:13:35 -04:00

M2_KEY_M.kicad_sch

Added Bottom Silk TP Labels

2025-04-09 19:39:31 -04:00

per_channel_designators_pcb.py

Linked PCB to Schematic

2024-12-06 21:12:16 -05:00

per_channel_designators.py

Reversed Channel Order

2025-04-07 13:53:55 -04:00

PLL.kicad_sch

USR and SYNC LVDS Delay Tuning Complete

2025-04-13 18:14:13 -04:00

Sheet_Template.kicad_wks

Changed Relay & Flash + 1st pass BOM optimizations

2024-12-17 01:59:46 -05:00

sym-lib-table

Linked PCB to Schematic

2024-12-06 21:12:16 -05:00

Thunderscope_Rev5.kicad_dru

Final Polish WIP

2025-04-14 15:53:12 -04:00

Thunderscope_Rev5.kicad_pcb

Rev 5 out to fab

2025-04-15 18:13:54 -04:00

Thunderscope_Rev5.kicad_prl

Rev 5 out to fab

2025-04-15 18:13:54 -04:00

Thunderscope_Rev5.kicad_pro

Rev 5 out to fab

2025-04-15 18:13:54 -04:00

Thunderscope_Rev5.kicad_sch

Added Bottom Silk TP Labels

2025-04-09 19:39:31 -04:00

Thunderscope_Rev5.kicad_sym

Added more test points

2025-04-07 16:19:28 -04:00

Thunderscope_Rev5.pdf

Moved CLK25 to P side of MRCC pair

2025-04-11 12:08:19 -04:00